Samsung has announced a collaboration with Japanese AI company Preferred Networks to supply 2nm-class chips. The Korean manufacturer plans to use its Interposer-Cube S 2.5D packaging technology.
Japanese AI company Preferred Networks aims to develop powerful AI accelerators to meet the growing demand for generative AI. To do so, it partnered with Samsung Electronics for its 2nm process node and 2.5D packaging technology Interposer-Cube S.
GaonChips, a specialised system semiconductor development company, designed the part. It leveraged Samsung’s 2.5D advanced packaging technology to integrate and connect multiple chips on one package using silicon interposers. The latter is crucial in delivering the power and signal integrity required for optimal performance, thanks to its ultra-fine redistribution layer.
Preferred Networks is a major player in the global AI market, achieving first place three times in the past five years on the Green500 list of supercomputers. This is helped by the company’s vertical integration of advanced software and hardware, unlocking the full potential of its designs.
“This order is pivotal as it validates Samsung’s 2nm GAA process technology and Advanced Package technology as an ideal solution for next-generation AI accelerators,” said Taejoong Song, Corporate VP and the head of Foundry Business Development Team at Samsung Electronics. “We are committed to closely collaborating with our customers ensuring that the high performance and low power characteristics of our products are fully realized.”
Samsung’s 2nm GAA (Gate All Around) is a transistor structure where the gate controls the channel flow on all four sides, marking the transition from FinFET (Fin Field-Effect Transistor). According to Samsung, its GAA technology allows for higher speeds at lower power consumption while taking less silicon space. A win, win, win situation.
In the future, Samsung will be working on MBCFET (Multi-Bridge Channel FET), which will widen the channels to allow more current flow while reducing resistance, further enhancing performance and efficiency. This channel width can be modified to suit different requirements: smaller ones for efficient chips or wider ones for high-performance CPUs, for example. Samsung expects to start mass production of its 2nm GAA in the second half of 2025.
