Intel upcoming Meteor Lake CPUs, to be known as 14th Gen Core, will feature five Tiles made using different nodes from Intel and TSMC, all connected via a silicon interposer.
During HotChips 34, Intel shed some light on its upcoming Meteor Lake, Arrow Lake, and Lunar Lake architectures. All three generations are taking advantage of Intel’s Foveros 3D packaging technology, meaning that Meteor Lake will have an MCM (multi-chip module) design made of multiple Tiles manufactured using different nodes from different foundries.
Meteor Lake will thus be combining five Tiles. A base Tile (or interposer) fabricated on the 22FFL (Intel 16) node, a CPU Tile leveraging Intel 4 (Previously 7nm) node, a GPU Tile from TSMC’s N5 (5nm) node, and an SoC-plus-I/O die based on TSMC’s N6 (6nm) node. Meteor Lake was expected to include Tiles made on TSMC’s 3nm process, before getting switched out to TSMC’s 5nm. Now it seems that 3nm will be used on Arrow Lake instead.
Among other details, Intel has also released a new diagram indicating that the next-gen consumer SoC will have six Redwood Cove P-cores plus eight Crestmont E-cores packed inside the CPU Tile, with graphics acceleration will be carried out by a 128EU or 192EU Xe-LPG GPU.
For years now, AMD has been using a chiplet design successfully against Intel… and Intel is finally catching up. Not simply contet to copy AMD’s approach, Intel wants to go more granular with the multi-Tile approach. While both approaches are quite different in their details, they share a similar philosophy – make each component smaller and on a suitable process, before connecting them via a fast interposer.
This approach offers many advantages. First, you can manufacture dies anywhere, making them less prone to shortages or factory shutdowns (e.g. caused by disasters). Second, as Intel has done, make each die using the most adequate node – for example, I/O is known to not benefit much from process shrink, so there’s little need to opt for the latest, most expensive silicon. And finally, it provides flexibility to adapt architectures to customer needs.
For now, Intel’s Tiles are connected via a passive interposer that doesn’t have any logic in it; this way there is no bandwidth or latency constraints that require design trade-offs. But Intel is planning to use active elements inside interposers sometime in the future.
Intel has confirmed Meteor Lake and Arrow Lake launch in 2023 and 2024, respectively.
